1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same, and particularly to a semiconductor device and a manufacturing method thereof capable of improving control on foam developed upon curing an encapsulating resin.
This application is a counterpart of Japanese Patent Application, Serial Number 320442/1999, filed Nov. 11, 1999, the subject matter of which is incorporated herein by reference.
2. Description of the Related Art
With recent high-density mounting, a semiconductor device designed in a BGA (Ball Grid Array) package described in, for example, Japanese Patent Application Laid-Open No. Hei 11-97567, wherein ball-shaped solder terminals are placed over a board or substrate mounting surface of the package in grid form, has come on the stage. With high-speed and high integration of an LSI, there has been an increasing demand for improvements in electric characteristics and heat dissipation property with respect to package mounting or implementation.
As one measure taken against it, there has been proposed a cavity down type BGA package wherein ground and power planes are placed over a multilayer printed circuit board to improve electric characteristics and a heat spreader is provided over a chip mounting surface to thereby enhance a heat dissipation property.
FIG. 8 is a cross-sectional view showing a semiconductor device designed in a conventional cavity down type BGA package.
This type of semiconductor device includes a semiconductor chip 1 on which, although not illustrated in the drawing, circuits and bonding pads are formed, a multi-layer wiring substrate or board 2 on which, although not shown in the drawing, bonding posts, circuits and through holes are formed in positions corresponding to the respective pads, a heat spreader 3 to which the semiconductor chip 1 and the wiring board 2 are fixed, metal thin wires 4 for connecting the pads and the posts respectively, and an encapsulating resin 5 for sealing the parts inclusive of the semiconductor chip 1 and the metal thin wires 4.
Solder balls 6 used as external terminals and a dam 7 are provided over the wiring board 2. Further, an opening for holding or accommodating the semiconductor chip 1 is defined in the wiring board 2. Although not shown in the drawing, the wiring board 2 is provided with ground and power planes for improving electric characteristics.
The semiconductor chip 1 is fixedly secured to the heat spreader 3 through the opening defined in the wiring board 2 with a die attach material 8 interposed therebetween. The wiring board 2 is fixedly secured to the heat spreader 3 with an adhesive 9. An organic adhesive is normally applied to the die attach material 8.
The encapsulating resin 5 such as an epoxy resin is charged up to an upper portion of the dam 7 and thereafter cured in a sealing process step. Afterwards, the solder balls 6 are fusioned so as to function as the external terminals respectively.
Defoaming is performed as needed upon charging of the encapsulating resin 5 to break or vanish foam which remain in the encapsulating resin 5, and a uniform sealed portion is formed after its curing, whereby a semiconductor device free of a reduction in reliability due to trapped moisture or the like is completed.
Incidentally, reference numeral 10 indicates a recessed portion of the adhesive 9, and reference numerals 11 indicate voids.
Since, however, the wiring board 2 and the heat spreader 3 are fixedly secured to each other with the adhesive 9 in the conventional example, the size of the mountable semiconductor chip 1 was limited in consideration of an extended-out portion of the adhesive 9.
When the width of the adhesive 9 is rendered narrow to eliminate the extended-out portion of the adhesive 9 where clearance between the semiconductor chip 1 and the wiring board 2 is less reduced due to the restriction that the body size of the package cannot be made great from a board mounting surface, and the reason of the electric characteristics of the metal thin wires 4, the recessed portion 10 is formed and foam are developed upon curing of the encapsulating resin. Thus, the foam remain as the voids 11 below narrow spatial portions of the metal thin wires 4, particularly in the neighborhood of the tops of the metal thin wires 4, whereby moisture resistance is reduced.
Further, a drawback arises in that even when the defoaming process step is introduced as a void measure, the volume of the recessed portion 10 becomes large and perfect defoaming is unfeasible, and a long time is required even if the defoaming becomes feasible, thereby causing a significant reduction in productivity.